はじめに
LLM Inference超絶速い Groq が 第2世代のLPU (V2-LPU) を現在開発していて、V3-IPU の検討を始めているのは下記のブログで書きました。
今回は、V3-LPU がどんなものをか妄想しました。
それでは、
Let's 妄想
V3-LPU
Groq の 「Package Design Engineering Lead」という職に、ヒントが書いてありました。
消えちゃうので、魚拓を取っておきます。
- Lead chip package design process including chip PAD ring, define substrate interconnect scheme
- Drive packaging effort end to end from concept to NPI, HVM, meet Cost/Manufacturability/Signal integrity/Flip chip assembly, Mechanical & Thermal requirements
- Co-work with chip design team to optimize package design via chip floorplan, bump and package ball out, stack up and physical routing based on system requirements
- Co-work with chip design, product engineering teams to come up with optimum substrate/ RDL solution to meet schedule/cost/component and system level requirements
- Work closely with Foundry and OSAT partners to develop and bring up new substrate/ RDL technology from definition to prototyping to HVM
- Own and execute Flip chip packages in single chip, 2.5D/3D in material optimization, NPI, CPI, package qualifications of component and board level, failure analysis
- Drive definition of DFM/DFT/DOE/FMEA , material selection, improving critical process window
-Own and execute Flip chip packages in single chip, 2.5D/3D in material optimization
とあります。
HBMを使わないという選択肢を取っているので、メモリ容量を増やすには、AMDの 3D V-Cache のように別 Die に SRAM をたくさん載せて、それを接続してつかうということになります。上に載せれば、3D、横に繋げれば、2.5D になります。
CPU subsystem
もう一つの職 : Staff Logic Design Engineerによれば、
- Logic Design for next generation Tensor Streaming Processor accelerator (TSP)
- Collaborate with the Architecture and Software teams on the definition of the ASIC architecture and microarchitecture
- Collaborate with Product Marketing, Architecture, Verification and Physical Design teams towards optimal area, performance and power targets.
- Drive low-power techniques into your designs.
- Full block ownership of one of the key logic blocks for our next generation TSP chip.
- Own all aspects of block
消えるので、魚拓も残します。
- CPU Subsystems
- AHB bus
- Interrupt handling
- IP integration
これは、V3-LPU の中に、CPUが入っているのか、それとも、PCIe/CXL 経由で繋がるホストCPUからのアクセスや割り込みに関するものなのでしょうか？
おわりに
GroqのV3-LPU、2.5D/3D になったら、面白そうですね。
それにしても、お賃金、日本の何倍なんでしょうか？
Staff Logic Design Engineer
Compensation: At Groq, a competitive base salary is part of our comprehensive compensation package, which includes equity and benefits. For this role, the base salary range is $181,700 to $365,400, determined by your skills, qualifications, experience and internal benchmarks.
Package Design Engineering Lead
Compensation: At Groq, a competitive base salary is part of our comprehensive compensation package, which includes equity and benefits. For this role, the base salary range is $208,800 to $420,400, determined by your skills, qualifications, experience and internal benchmarks.
では、次回も
Let's 妄想
